This signal cascade includes the input pathway of the clock, the central oscillator and the output pathway of the clock. 这种信号传导系统包括光信号输入途径,生物钟振荡器系统和信号输出系统三部分。
In view of concrete application, a new method of using cascade IGBT to achieve DC/ DC switch power supply under high input voltage is proposed. 结合具体应用背景提出了一种在高输入电压下利用串级IGBT实现DC/DC开关电源的新思路。
Based on the bulk driven PMOS transistor, a low voltage CMOS cascade current mirror ( BDCCM) is presented, then the input/ output impedance and frequency characteristics are discussed. 基于衬底驱动PMOS晶体管设计了低压PMOS衬底驱动CMOS共源共栅电流镜电路(BDCCM),并讨论分析了其输入阻抗、输出阻抗和频率特性。
The inner loop of the cascade controller adopts adaptive control algorithm with inductance and input voltage estimators and takes the inductor current as the controlled variable. 控制器的内环采用基于电感和输入电压估计的自适应控制算法,以电感电流为被控量;
This paper investigates the cascade synthesis of the lossless network double-end loaded with resistance. The concept of zero-pole distributive chart of the input impedance is defined. 在研究两端电阻负载无损网络的链联综合的基础上,文中引进了输入阻抗的零极点分布图的概念,使用这一概念给出了A。
The cascade construction of MAC with a variable length input NEWS REPORTS 输入长度可变的消息认证码的级联构造
The basic structure of the circuit is two stage cascade, in which were a CE ( common emitter) structure as input and a Darlington structure as output. 电路的基本结构采用两级放大结构,以共发射极结构作为输入级,以达林顿结构作为输出级。
The Viterbi algorithm for the cascade connection model may be applied after the whole sample series of a word is input. Compared to the method of creating models for each word in lexicon, this method could avoid the problem of recognition asynchronous. 采用面向级联的Viterbi算法,在完整的单词采样序列输入后直接识别,无需做字符的分割和标注,从而避免了在字典中为每个单词建立模型而导致的识别不同步问题。
At first, the corresponding augmented state equation of networked cascade control system is given and the augmented system state estima-tor was designed to predict control is given input sequence and compensator selection control input. 首先,给出网络化串级控制系统对应的增广状态方程并设计增广系统状态估计器,给出根据状态估计器得出预测控制输入序列及补偿器选取控制输入的方式。
The Exclusive-NOR circuits for implementing coincidence logic in general has two structures& cascade and tree, the latter suitable for the situation when the input variable-number is large and the circuits speed need to be high. 实现符合逻辑的同或电路主要有串联和树形2种实现结构,后者适合输入变量数较多且对电路速度要求较高的情况。
The cascade system can realize same input terminal voltage and output side current equalizing. 级联系统模块间能实现输入端的均压与输出侧的均流。